A simulation-based comparison of two reflective memory approaches

The Reflective Memory/Memory Channel @h&UC) system represents a modular bus-based system architecture that belongs to the class of distrtbuted shared memory systems. The RWMC system is characterized by an update consistenqv mechanism for shared data and egicient block transfers over the bus. This worh has tnw main goals. First, an extensive simulation anat’ysis using the firnch’onal Ru/MC simulator based on a very convenient and flexible synthetic worhload model was car&d out in order to evaluate the d@erent design and implementation decisions and variants of the RiwMC concepts for a wide van’ety of the values of the relevant application-. architecture-, and technology-related pammeters. In this way, an optimal set of values of relevant pammeters was found. Second, this paper presents one improvement to the basic concept intiuced to enhance the real-time response of the system. The proposed idea combines the compileand run-time actions intended to reduce the latency of short messages. A set of experiments is per$ormed to evaluate the eficiencv of the proposed enhancement. The most important results are presented and discussed here.